1. Field of the Invention
The present invention is related to digital to analog converters.
2. Background Art
An analog section of digital-to-analog converters (DACs) usually receives complementary drive signals that are generated using a switch driver circuit. The switch driver circuit receives digital signals and generates the drive signals therefrom. The analog section uses the received drive signals to generate analog signals representative of the digital signals.
A problem can arise when a switch is turned off. The released charge from the switch being turned off is injected into an output node, which causes glitches (e.g., temporary peaks and values, for example spikes) in the analog signals. Further, a capacitive coupling between a control node and the output node can cause additional glitches. The glitches can lower the signal-to-noise ratio (SNR) at an output node. Performance of the DAC can be severely hampered if the glitches cause the SNR to cross a threshold level.
Therefore, what is needed is a system and method that substantially eliminate glitches in an output analog signal.